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Fairchild Clipper C100
  Fairchild Clipper C100
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The Clipper C100 Processor
The Clipper architecture was originally developed at Fairchild Semiconductor in Oct. 1985, and began shipping in 1986. It is implemented in a three chip module consisting of a microprocessor chip and two cache and memory management (CAMMU) chips, mounted on a small PC board.
 
The architecture was acquired by Intergraph Corporation in 1987.
 
References:  Instruction Set and Processor Implementation [pdf]  Memory Architecture, Cache and MMU [pdf]
Fairchild Clipper C100
Fairchild Clipper C100 Top Side
CODE (C)
1985 FAIRCHILD
(M) FAIRCHILD
C111C1Q
C043520
8744 USA
Fairchild Clipper C100 Top Side
Fairchild Clipper C100 Back Side
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Core Frequency:33 MHz
Board Frequency:33 MHz
Data bus (ext.):32 Bit
Address bus:32 Bit
Transistors:132,000
Circuit Size:2.00
Introduced:1986
Manufactured:week 44/1987
Made in:USA
L1 Cache:4+4 KB
Package Type:Ceramic
QFP-132
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