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1983: DEC
  week 09, 1983: DEC PDP-11 F-11
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DEC PDP-11 F-11
DEC PDP-11 F-11 Top Side
DEC 303E
23-001C7-AA
8201
570000001A1
DEC 8309
DEC 302H
21-15541-AB
8234

DEC PDP-11 F-11 Back Side
BP01
The DEC F-11 is a multi-chip module consisting of 2 chips:
The Control chip (DC303) implements the microword access and sequencing functions of the F-11 chip set. Its key features are:
  • ROM/PLA control store (138 x 23 bit PLA terms, 414 ROM terms)
  • Chip set microsequencing
  • Interrupt logic
  • Abort logic
  • Initial decode PLA


The Data chip (DC302) implements the instruction execution path of the F-11 chip set. The Data chip operates under the control of microwords fetched from the Control chip(s). Its key features are:
  • Execution data path
  • PDP-11 architectural general registers (16 bit), three stack pointers
  • Processor status word (PSW)
  • Microcode temporary registers (16 bit)
  • Full function arithmetic/logic unit (16 bit)
  • Single bit shifter/byte swapper
  • Condition code logic
  • External interface sequencer
 
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Core Frequency:3.6 MHz
Board Frequency:3.6 MHz
Data bus (ext.):22 Bit
Address bus:16 Bit
Transistors:29,000
Circuit Size:6.00 µ
Introduced:1979
Manufactured:week 09/1983
Package Type:Ceramic
DIP-40
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