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Intergraph Clipper
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The Clipper C4 Processor
The Clipper architecture was originally developed at Fairchild Semiconductor in Oct. 1985, and began shipping in 1986. The architecture was acquired by Intergraph Corporation in 1987.
 
The C400 processor combined two key architectural techniques to achieve a new level of performance. The first - superscalar instruction dispatch - boosted performance by executing more than one operation at a time. The second technique - superpipelined operation - used high clock rates to boost performance. Since complex tasks such as floating-point multiplications could not be done in a single, short clock cycle, the C400 would break long operations into many short pieces called stages.
 
Many 2nd generation RISC processors used one or the other of these techniques, but only the C400 Clipper used both.
 
References: Usenet announcement
Intergraph Clipper C4
Intergraph Clipper C4 Top Side
(C) (M) 1991
C4 CPU REV 3
CICD 100A1
F31520005A
9303-128
9317 USA
Intergraph Clipper C4 Top Side
This CPU is from my Intergraph Series 2700 graphics workstation. The module shows the CPU with an FPU and a Cache and Memory Management Unit (CAMMU)
 
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Data bus (ext.):64 Bit
Address bus:32 Bit
Transistors:160,000
Introduced:9/1990
Manufactured:week 17/1993
Made in:USA
L1 Cache:128 ext. KB
CPU Code:Kryptonite
Package Type:Ceramic
PGA-299
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Intergraph Clipper C4 FPU
Intergraph Clipper C4 FPU Top Side
(C) (M) 1991
C4 FPU REV 3
CICD 85406
F3141Y003B
9212-153
9303 USA
This FPU is from my Intergraph Series 2700 graphics workstation.
 
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Introduced:9/1990
Manufactured:week 03/1993
Made in:USA
Package Type:Ceramic
PGA-299
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