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Cypress SPARC
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The Cypress / ROSS Technology CY7C601 Processor
ROSS Technology
The Cypress CY7C601 is the 2nd generation SPARC processor, developed by ROSS Technology, then a subsidary of Cypress Semiconductor. When Cypress sold ROSS to Fujitsu in 1993 the chip was renamed to ROSS RT601.
 
The CY7C601 has no on-chip cache; off-chip cache is 64K, write-back (can be run in write-through mode, but the OS puts it in write-back mode), direct-mapped, virtually-indexed and virtually and physically tagged (for MP cache coherency). Lines are 32 bytes.
 
The first two implementations of the SPARC architecture, Fujitsu MB86900 and Cypress/ROSS CY7C601, were designed using high-speed CMOS technology with processor clock speed in the range of 16.6 to 33 MHz. In a system with a reasonable size external cache, these processors execute integer operations at a rate of approximately 1.5 clock cycles per instruction, resulting in a sustained performance in the range of 10 to 20 MIPS. The MB86900 design uses a single 20,000-gate 1.3 CMOS gate array and operates at a cycle time of 60 ns. The CY7C601 is a full custom chip designed using a 0.8 CMOS process and operates at a cycle time of 30 ns.
Cypress SPARC CY7C601-40GC
Cypress SPARC CY7C601-40GC Top Side
SUN MICRO-A
CY7C601
-40GC USA IU
9112 62531
Cypress SPARC CY7C601-40GC Back Side
The CY7C601 was used in Sun SPARCstation and SPARCserver 330, 370 and 390, this 40 MHz PGA version is from a SPARCstation 2.
 
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Core Frequency:40 MHz
Board Frequency:40 MHz
Data bus (ext.):32 Bit
Address bus:32 Bit
Transistors:1,800,000
Circuit Size:0.80
Introduced:July 1989
Manufactured:week 12/1991
Made in:USA
Package Type:Ceramic
PGA-207
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Cypress SPARC CY7C601-40
Cypress SPARC CY7C601-40 Top Side
CY7C601-40 US9212 84706
Cypress SPARC CY7C601-40 Top Side
A Cypress CY7C601 SPARC CPU on the first SPARC MBus module Ross CYM6001K. The module has mounted a CY7C604 MMU, the CY7C601 CPU and a Cypress CY7C602 FPU chip (from left to right).
 
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Core Frequency:40 MHz
Board Frequency:40 MHz
Data bus (ext.):32 Bit
Address bus:32 Bit
Transistors:1,800,000
Circuit Size:0.80
Introduced:1989
Manufactured:week 12/1992
Package Type:Ceramic
QFP-208
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Cypress CY7C602-40
Cypress CY7C602-40 Top Side
CY7C602-40 US9209BK 83100
Cypress CY7C602-40 Top Side
A Cypress CY7C602 SPARC FPU on the first SPARC MBus module Ross CYM6001K. The module has mounted a CY7C604 MMU, a CY7C601 CPU and the Cypress CY7C602 FPU chip (from left to right).
 
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Core Frequency:40 MHz
Board Frequency:40 MHz
Manufactured:week 09/1992
Package Type:Ceramic
QFP-160
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