engineering sample samples qualification cpu processor prozessor information mhz pictures core frequency chip packaging info ic x86 museum collection amd cyrix harris ibm idt iit intel motorola nec sgs sgs-thomson siemens ST signetics mhs ti texas instruments ulsi hp umc weitek zilog 4004 4040 8008 808x 8085 8088 8086 80188 80186 80286 286 80386 386 i386 Am386 386sx 386dx 486 i486 586 486sx 486dx overdrive 80187 80287 387 487 pentium 586 5x86 386dlc 386slc 486dx2 mmx ppro pentium-pro pro athlon duron z80 sparc alpha dec dirk oppelt
home
1987: Fujitsu
  week 46, 1987: Fujitsu SPARC MB86900
» Fujitsu overview
» all chips made in 1987
 
Fujitsu SPARC MB86900
Fujitsu SPARC MB86900 Top Side
F JAPAN
MB86900
8746 Q34
Fujitsu SPARC MB86900 Back Side
Donated by Sunopsis, the Sun Museum. Thanks a lot!  
The MB86900 (also known as SF9010) was the very first SPARC processor. It was implemented on a pair of 20,000-gate Fujitsu gate-array chips and was used to power the Sun 4/260 'Sunrise' server and the 4/110 'Cobra', the first SPARC desktop computer (1987).
 
The first two implementations of the SPARC architecture, Fujitsu MB86900 and Cypress/ROSS CY7C601, were designed using high-speed CMOS technology with processor clock speed in the range of 16.6 to 33 MHz. In a system with a reasonable size external cache, these processors execute integer operations at a rate of approximately 1.5 clock cycles per instruction, resulting in a sustained performance in the range of 10 to 20 MIPS. The MB86900 design uses a single 20,000-gate 1.3 CMOS gate array and operates at a cycle time of 60 ns. The CY7C601 is a full custom chip designed using a 0.8 CMOS process and operates at a cycle time of 30 ns.
 
add comment
Core Frequency:15 MHz
Board Frequency:15 MHz
Data bus (ext.):32 Bit
Address bus:32 Bit
Transistors:110,000
Circuit Size:1.30
Voltage:5 V
Introduced:1986
Manufactured:week 46/1987
Made in:Japan
Package Type:Ceramic
PGA-256
top of page