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HP PA-RISC
  HP PA-RISC 7100LC (PCX-L)
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HP PA-RISC 7100LC (PCX-L)
HP PA-RISC 7100LC (PCX-L) Top Side
hp 5960-1342REVB
HP PA-RISC 7100LC (PCX-L) Back Side
The PA7100LC was primarily designed as a single-chip solution for application in low cost systems while still delivering the performance of '91 high-end workstations and servers. Contrary to earlier PA1.1 implementations which needed several support chips for the MPU the PA7100LC integrates the CPU, FPU, MIOC (memory and I/O controller) and a first-level cache on a single VLSI chip.
This CPU was used in HP 9000 712, 715 and 725 workstations and some D- and E-class servers.
 
References: PA 7100LC at OpenPA.net
 
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Core Frequency:80 MHz
Data bus (ext.):64 Bit
Address bus:32 Bit
Transistors:900,000
Circuit Size:0.75
Manufactured:week ?/1992
L1 Cache:1 KB
CPU Code:PCX-L / Hummingbird
Package Type:Ceramic
PGA-431
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HP PA-RISC 7200 (PCX-T')
HP PA-RISC 7200 (PCX-T') Top Side
5960-1344 REV A
HPfc 1FQ4-0008 4644
USA 9542 3.2 #
1FQ4-
0007
HP PA-RISC 7200 (PCX-T') Top Side
The PA7200 is leveraged from the original PA7100 design, big parts of the core were just shrunk for the new 0.55 micron process. The FPU was taken over completely unchanged, retaining the same latencies for addition and multiplication even at a higher clock rate.
The item here is a CPU module from a J200 series HP server. The PA-RISC 7200 was used in C- and D-class servers and J200 and 210 workstations.
 
References: PA 7200 at OpenPA.net
 
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Core Frequency:100 MHz
Data bus (ext.):64 Bit
Address bus:32 Bit
Transistors:1,300,000
Circuit Size:0.55
Introduced:1995
Manufactured:week 42/1995
L1 Cache:2 KB
L2 Cache:1 MB ext.
CPU Code:PCX-T' / Thunderbird'
Package Type:Ceramic
PGA-539
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